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| author | Carlo Zancanaro <carlo@pc-4w14-0.cs.usyd.edu.au> | 2012-10-15 17:10:06 +1100 |
|---|---|---|
| committer | Carlo Zancanaro <carlo@pc-4w14-0.cs.usyd.edu.au> | 2012-10-15 17:10:06 +1100 |
| commit | be1de4be954c80875ad4108e0a33e8e131b2f2c0 (patch) | |
| tree | 1fbbecf276bf7c7bdcbb4dd446099d6d90eaa516 /clang/test/CodeGenObjC/bitfield-access.m | |
| parent | c4626a62754862d20b41e8a46a3574264ea80e6d (diff) | |
| parent | f1bd2e48c5324d3f7cda4090c87f8a5b6f463ce2 (diff) | |
Merge branch 'master' of ssh://bitbucket.org/czan/honours
Diffstat (limited to 'clang/test/CodeGenObjC/bitfield-access.m')
| -rw-r--r-- | clang/test/CodeGenObjC/bitfield-access.m | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/clang/test/CodeGenObjC/bitfield-access.m b/clang/test/CodeGenObjC/bitfield-access.m new file mode 100644 index 0000000..521d2e5 --- /dev/null +++ b/clang/test/CodeGenObjC/bitfield-access.m @@ -0,0 +1,44 @@ +// RUN: %clang_cc1 -triple i386-apple-darwin10 -fobjc-fragile-abi -emit-llvm -o %t1 %s +// RUN: FileCheck -check-prefix=CHECK-I386 < %t1 %s + +// RUN: %clang_cc1 -triple armv6-apple-darwin10 -fobjc-fragile-abi -target-abi apcs-gnu -emit-llvm -o %t2 %s +// RUN: FileCheck -check-prefix=CHECK-ARM < %t2 %s + +@interface I0 { +@public + unsigned x:15; + unsigned y: 1; +} +@end + +// Check that we don't try to use an i32 load here, which would reach beyond the +// end of the structure. +// +// CHECK-I386: define i32 @f0( +// CHECK-I386: [[t0_0:%.*]] = load i16* {{.*}}, align 1 +// CHECK-I386: lshr i16 [[t0_0]], 7 +// CHECK-I386: } +int f0(I0 *a) { + return a->y; +} + +// Check that we can handled straddled loads. +// +// CHECK-ARM: define i32 @f1( +// CHECK-ARM: [[t1_ptr:%.*]] = getelementptr +// CHECK-ARM: [[t1_base:%.*]] = bitcast i8* [[t1_ptr]] to i32* +// CHECK-ARM: [[t1_0:%.*]] = load i32* [[t1_base]], align 1 +// CHECK-ARM: lshr i32 [[t1_0]], 1 +// CHECK-ARM: [[t1_base_2_cast:%.*]] = bitcast i32* %{{.*}} to i8* +// CHECK-ARM: [[t1_base_2:%.*]] = getelementptr i8* [[t1_base_2_cast]] +// CHECK-ARM: [[t1_1:%.*]] = load i8* [[t1_base_2]], align 1 +// CHECK-ARM: and i8 [[t1_1:%.*]], 1 +// CHECK-ARM: } +@interface I1 { +@public + unsigned x: 1; + unsigned y:32; +} +@end + +int f1(I1 *a) { return a->y; } |